2.1.1++CPU+and+its+Architecture

=**__CPU __**=   CPU stands for Central Processing Unit, and is the Heart of a computer. In any normal computer this CPU is a microprocessor. A microprocessor is a chip that does all of the calculations for the computer. The CPU contains three major parts: and the primary memory (Note: in some definitions the primary memory does not belong to the CPU).
 * the Control Unit (CU),
 * the Arithmetic and Logic Unit (ALU),

__1. Control Unit (CU) __ The Control Unit controls the CPU and manages what happens inside of it.
 * Controls sequence of execution
 * Moves data between the CPU and the computer memory via the data bus
 * Controls what is stored in the cache for fastest access
 * Accesses the memory addresses with the address bus. The address bus is connected to the address section of the computer’s memory
 * Also takes care of fetching and decoding

__2. Arithmetic Logic Unit (ALU) __
 * Carries out logical operations (ex. Comparisons)
 * Carries out arithmetic operations (ex. Addition)

__3. Primary Memory __<span style="font-family: Arial,Helvetica,sans-serif;"> //[see section 3.2.5 Primary Memory ] //

__<span style="font-family: Arial,Helvetica,sans-serif;">4. Buses __
 * <span style="font-family: Arial,Helvetica,sans-serif; margin-top: 0cm;">Address bus: With the address bus addresses of locations in the primary memory are transferred. The according actual information then is transferred with the data bus.
 * <span style="font-family: Arial,Helvetica,sans-serif; margin-top: 0cm;">Data bus: Actual data is transferred via this bus. The addresses declaring which data to send or where to send the information are sent via the address bus.

__<span style="font-family: Arial,Helvetica,sans-serif; margin-top: 0cm;">5. MDR and MAR __
 * These are the Memory Address Register and Memory Data Register of the CPU
 * They work together as a way for the CPU to get data out of the RAM
 * MAR
 * The Memory Address Register is there to send the address/location of a certain data point in the RAM
 * It does this over the Address Bus
 * MDR
 * Next the MDR uses this location and the Data BUS to gather the information and function as a type of cache
 * It works in two ways.
 * It can either write information it gets from the CPU into the memory
 * or it can use the address from the MAR to gather data from the RAM and keep it ready for the CPU to use it

Vocabulary review/flashcards: Quizlet.com

Last modified by: D3LTA Last updated: 27th September 2012

Sources:
 * "Arithmeic Logic Unit." Wikipedia. 25 August 2010. Wikimedia.org. 2 September 2010. https://secure.wikimedia.org/wikipedia/en/wiki/Arithmetic_logic_unit
 * "Control Unit." Wikipedia. 31 August 2010. Wikimedia.org. 2 September 2010. https://secure.wikimedia.org/wikipedia/en/wiki/Control_unit
 * Jones, Richard. Computer Science Java Enabled. Victoria: IBID Press, 2004.