6.1.4+BUSes+and+other+Hardware

=__Describe how buses link the processor, the random access memory, the read only memory and cache. __=
 * A bus is a bridge between two components of a computer (ie. RAM and cache)
 * There are buses inside the CPU linking the cache to the other components
 * This enables a fast communication between all the major components
 * There are 3 major types of buses
 * Address bus
 * Data bus
 * Memory bus


 * The Address bus is specifically there for transferring addresses to the register in order for the CPU to read or write data to the RAM.
 * The data bus is there to transport the the necessary data (specified by the address from the address bus) from the RAM to the register.
 * The memory bus transfers data from the primary memory to the memory controller.


 * "Bus (computing)." Wikipedia. 2 September 2010. Wikimedia.org. 15 September 2010. https://secure.wikimedia.org/wikipedia/en/wiki/Bus_%28computing%29
 * "Bus (datenverarbeitung)." Wikipedia. 19 September 2010. Wikimedia.org. 21 September 2010.
 * Jones, Richard. Computer Science Java Enabled. Victoria: IBID Press, 2004.
 * "Memory Bus." Wikipedia. 14 September 2010. Wikimedia.org. 21 September 2010. http://en.wikipedia.org/wiki/Memory_bus